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ltc3225/ltc3225-1 1 3225fb typical application features applications description 150ma supercapacitor charger the ltc ? 3225/ltc3225-1 are programmable supercapaci- tor chargers designed to charge two supercapacitors in series to a selectable ? xed output voltage (4.8v/5.3v for the ltc3225 and 4v/4.5v for the ltc3225-1) from input supplies as low as 2.8v to 5.5v. automatic cell balancing prevents overvoltage damage to either supercapacitor. no balancing resistors are required. low input noise, low quiescent current and low external parts count (one ? ying capacitor, one bypass capacitor at v in and one programming resistor) make the ltc3225/ ltc3225-1 ideally suited for small battery-powered applications. charge current level is programmed with an external resistor. when the input supply is removed, the ltc3225/ ltc3225-1 automatically enter a low current state, drawing less than 1a from the supercapacitors. the ltc3225/ltc3225-1 are available in a 10-lead 2mm 3mm dfn package. n low noise constant frequency charging of two series supercapacitors n automatic cell balancing prevents capacitor overvoltage during charging n programmable charge current (up to 150ma) n selectable 2.4v or 2.65v regulation per cell (ltc3225) n selectable 2v or 2.25v regulation per cell (ltc3225-1) n automatic recharge n i vin = 20a in standby mode n i cout < 1a when input supply is removed n no inductors n tiny application circuit (2mm 3mm dfn package, all components <1mm high) n current limited applications with high peak power loads (led flash, pcmcia tx bursts, hdd bursts, gprs/gsm transmitter) n backup supplies charging pro? le with 30% mismatch in output capacitance, c top < c bot l , lt, ltc and ltm are registered trademarks and thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. v in c + c C shdn v sel on/ off output programming c out cx gnd pgood prog ltc3225 ltc3225-1 100k 0.6f 0.6f 12k 3225 ta01a 1f 2.2f v out 4.8v/5.3v (ltc3225) 4v/4.5v (ltc3225-1) v in 2.8v/3v to 5.5v shdn 5v/div v cout 2v/div v top -v bot 200mv/div i vin 300ma/div 5 sec/div 3225 ta01b ltc3225 v sel = v in r prog = 12k c top = 1.1f c bot = 1.43f c top initial voltage = 0v c bot initial voltage = 0v
ltc3225/ltc3225-1 2 3225fb pin configuration absolute maximum ratings v in , c out to gnd ......................................... C0.3v to 6v shdn , v sel ...................................... C0.3v to v in + 0.3v c out short-circuit duration ............................. inde? nite i vin continuous (note 2) ......................................350ma i out continuous (note 2) .....................................175ma operating temperature range (note 3).... C40c to 85c storage temperature range ................... C65c to 125c (note 1) top view 11 ddb package 10-lead (3mm s 2mm) plastic dfn c + c C cx shdn pgood c out v in gnd prog v sel 6 8 7 9 10 5 4 2 3 1 t jmax = 125c, ja = 76c/w exposed pad (pin 11) must be soldered to low impedance gnd plane (pin 8) on pcb order information electrical characteristics symbol parameter conditions min typ max units ltc3225 v in-uvlo input supply undervoltage lockout high-to-low threshold v sel = v in v sel = 0 l l 2.65 2.4 2.75 2.5 2.85 2.6 v v v in-uvlo-hys input supply undervoltage lockout hysteresis v sel = v in v sel = 0 150 140 mv mv v in input voltage range v sel = v in v sel = 0v l l 3 2.8 5.5 5.5 v v v cout charge termination voltage sleep mode threshold (rising edge) v sel = v in v sel = 0v l l 5.2 4.7 5.3 4.8 5.4 4.9 v v v cout-hys output comparator hysteresis 100 mv v top/bot maximum voltage across each of the supercapacitors after charging v sel = v in v sel = 0v l l 2.75 2.5 v v ltc3225-1 v in-uvlo input supply undervoltage lockout high-to-low threshold v sel = v in v sel = 0 l l 2.25 2.0 2.35 2.1 2.45 2.2 v v v in-uvlo-hys input supply undervoltage lockout hysteresis v sel = v in v sel = 0 150 140 mv mv the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = 3.6v, c in = 2.2f, c fly = 1f, unless otherwise speci? ed (note 3). lead free finish tape and reel (mini) tape and reel part marking package description temperature range ltc3225eddb#trmpbf ltc3225eddb#trpbf lcyr 10-lead (3mm 2mm) plastic dfn C40c to 85c ltc3225eddb-1#trmpbf ltc3225eddb-1#trpbf lffs 10-lead (3mm 2mm) plastic dfn C40c to 85c trm = 500 pieces. consult ltc marketing for parts speci? ed with wider operating temperature ranges. consult ltc marketing for information on lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/
ltc3225/ltc3225-1 3 3225fb symbol parameter conditions min typ max units v in input voltage range v sel = v in v sel = 0 l l 2.8 2.8 5.5 5.5 v v v cout charge termination voltage sleep mode threshold (rising edge) v sel = v in v sel = 0 l l 4.4 3.9 4.5 4.0 4.6 4.1 v v v cout-hys output comparator hysteresis 100 mv v top/bot maximum voltage across each of the supercapacitors after charging v sel = v in v sel = 0 l l 2.35 2.1 v v ltc3225/ltc3225-1 i q-vin no load operating current at v in i out = 0ma l 20 40 a i shdn-vin shutdown current shdn = 0v, v out = 0v l 0.1 1 a i cout c out leakage current v out = 5.6v, shdn = 0v v out = 5.6v, charge pump in sleep mode v out = 5.6v, shdn connected to v in with input supply removed l l 1 2 3 4 1 a a a i vin input charge current v in = 3.6v, r prog = 12k, c top = c bot 306 ma v in = 3.6v, r prog = 60k, c top = c bot 55 ma i out output charge current v in = 3.6v, r prog = 12k, c top = c bot , v out = 4.5v (ltc3225), v out = 3.7v (ltc3225-1) 125 150 175 ma v in = 3.6v, r prog = 60k, c top = c bot , v out = 4.5v (ltc3225), v out = 3.7v (ltc3225-1) 26 ma v pgood pgood low output voltage i pgood = C1.6ma l 0.4 v i pgood-leak pgood high impedance leakage current v pgood = 5v l 10 a v pg pgood low-to-high threshold relative to output voltage threshold l 92 94 96 % v pg-hys pgood threshold hysteresis relative to output voltage threshold l 0.25 1.2 2.5 % r ol effective open-loop output impedance (note 4) v in = 3.6v, v out = 4.5v (ltc3225) v in = 3.6v, v out = 3.7v (ltc3225-1) 8 9 f osc clk frequency l 0.6 0.9 1.5 mhz v sel , shdn v ih input high voltage l 1.3 v v il input low voltage l 0.4 v i ih input high current l C1 1 a i il input low current l C1 1 a electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = 3.6v, c in = 2.2f, c fly = 1f, unless otherwise speci? ed (note 3). note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: based on long-term current density limitations. note 3: the ltc3225/ltc3225-1 are tested under pulsed load conditions such that t j t a . the ltc3225/ltc3225-1 are guaranteed to meet performance speci? cations from 0c to 85c. speci? cations over the C40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 4: output not in regulation; r ol (2 ? v in C v out )/i out
ltc3225/ltc3225-1 4 3225fb oscillator frequency vs supply voltage charge pump open-loop output resistance vs temperature (2v in C v cout )/i out typical performance characteristics (t a = 25c, c fly = 1f, c in = 2.2f, c top = c bot , unless otherwise speci? ed) i out (ma) 20 4 5 7 80 120 3225 g04 3 40 60 100 140 160 2 6 extra i in (ma) v in = 3.6v charge pump is on v out = 4.5v v out = 5v v out = 3.7v v out = 4.2v v in (v) 2.5 0 i in (a) 5 10 15 20 30 3 3.5 4 4.5 3225 g05 5 5.5 25 t a = 85c t a = 25c t a = C40c v in 20mv/div i vin 200ma/div 200ns/div 3225 g08 r prog = 12k 0ma charging pro? le with unequal initial output capacitor voltage (initial v top = 1.3v, v bot = 1v) v in (v) 2.5 0.88 frequency (mhz) 0.89 0.91 0.92 3 3.5 4 4.5 3225 g07 5 0.93 0.94 0.90 5.5 t a = 25c t a = 85c t a = C40c temperature (c) C40 r ol () 7.5 8.0 8.5 35 85 3225 g06 7.0 6.5 6.0 C15 10 60 9.0 9.5 10.0 v out = 3.7v (ltc3225-1) v out = 4.5v (ltc3225) v in = 3.6v shdn 5v/div v cout 2v/div v top -v bot 500mv/div i vin 300ma/div 2 sec/div 3225 g09 ltc3225 v sel = v in r prog = 12k c top = c bot = 1.1f c top initial voltage = 1.3v c bot initial voltage = 1v extra input current vs output current (i vin C 2 ? i out ) no-load input current vs supply voltage input ripple and input current i out vs r prog ef? ciency vs v in i out vs v out (r prog = 12k) r prog (k) 10 i out (ma) 60 80 100 40 60 3225 g01 40 20 0 20 30 50 120 140 160 v in = 3.6v v out = 4.5v (ltc3225) v out (v) 0 0 i out (ma) 20 60 80 100 2 4 5 180 3225 g02 40 13 0.5 2.5 4.5 1.5 3.5 120 140 160 v in = 2.8v v in = 3.6v v in = 5.5v c top = c bot v in (v) 2.5 0 efficiency (%) 10 30 40 50 4.5 100 90 3525 g03 20 3.5 3 5 4 5.5 60 70 80 v sel = v in v sel = 0 i load = 100ma c top = c bot ltc3225 ltc3225-1
ltc3225/ltc3225-1 5 3225fb pin functions c + (pin 1): flying capacitor positive terminal. a 1f x5r or x7r ceramic capacitor should be connected from c + to c C . c C (pin 2): flying capacitor negative terminal. cx (pin 3): midpoint of two series supercapacitors. this pin voltage is monitored and forced to track c out (cx = c out /2) during charging to achieve voltage balancing of the top and bottom supercapacitors. shdn (pin 4): active low shutdown input. a low on shdn puts the ltc3225/ltc3225-1 in low current shutdown mode. do not ? oat the shdn pin. pgood (pin 5): open-drain output status indicator. upon start-up, this open-drain pin remains low until the output voltage, v out , is within 6% (typical) of its ? nal value. once v out is valid, pgood becomes hi-z. if v out falls 7.2% (typical) below its correct regulation level, pgood is pulled low. pgood may be pulled up through an external resistor to an appropriate reference level. this pin is hi-z in shutdown mode. v sel (pin 6): output voltage selection input. a logic low at v sel sets the regulated c out to 4.8v (ltc3225) or 4v (ltc3225-1); a logic high sets the regulated c out to 5.3v (ltc3225) or 4.5v (ltc3225-1). do not ? oat the v sel pin. prog (pin 7): charge current programming pin. a resis- tor connected between this pin and gnd sets the charge current. (see applications information section). gnd (pin 8, exposed pad pin 11): charge pump ground. these pins must be soldered directly to pcb ground. the exposed pad must be soldered to a low impedance pcb ground for rated thermal performance. v in (pin 9): power supply for the ltc3225/ltc3225-1. v in should be bypassed to gnd with a low esr ceramic capacitor of more than 2.2f. c out (pin 10): charge pump output pin. connect c out to the top plate of the top supercapacitor. c out provides charge current to the supercapacitors and regulates the ? nal volt- age to 4.8v/5.3v (ltc3225) or 4v/4.5v (ltc3225-1). charging pro? le with unequal initial output capacitor voltage (initial v top = 1v, v bot = 1.3v) shdn 5v/div v cout 2v/div v top -v bot 500mv/div i vin 300ma/div 2 sec/div 3225 g10 ltc3225 v sel = v in r prog = 12k c top = c bot = 1.1f c top initial voltage = 1v c bot initial voltage = 1.3v shdn 5v/div v cout 2v/div v top -v bot 200mv/div i vin 300ma/div 5 sec/div 3225 g11 ltc3225 v sel = v in r prog = 12k c top = 1.43f c bot = 1.1f c top initial voltage = 0v c bot initial voltage = 0v shdn 5v/div v cout 2v/div v top -v bot 200mv/div i vin 300ma/div 5 sec/div 3225 g12 ltc3225 v sel = v in r prog = 12k c top = 1.1f c bot = 1.43f c top initial voltage = 0v c bot initial voltage = 0v charging pro? le with 30% mismatch in output capacitance (c top > c bot ) charging pro? le with 30% mismatch in output capacitance (c top < c bot ) typical performance characteristics (t a = 25c, c fly = 1f, c in = 2.2f, c top = c bot , unless otherwise speci? ed)
ltc3225/ltc3225-1 6 3225fb simplified block diagram the ltc3225/ltc3225-1 are dual cell supercapacitor char- gers. their unique topology maintains a constant output voltage with programmable charge current. their ability to maintain equal voltages on both cells while charging protects the supercapacitors from damage that is possible with other charging methods, without the use of external balancing resistors. the ltc3225/ltc3225-1 include an internal switched capacitor charge pump to boost v in to a regulated output voltage. a unique architecture maintains relatively constant input current for the lowest possible input noise. the basic charger circuit requires only three external components. figure 1 operation normal charge cycle operation begins when the shdn pin is pulled above 1.3v. the c out pin voltage is sensed and compared with a preset voltage threshold using an internal resistor divider and a comparator. the preset voltage threshold is selectable with the v sel pin. if the voltage at the c out pin is lower than the preset voltage threshold, the oscillator is enabled. the oscillator operates at a typical frequency of 0.9mhz. when the oscillator is enabled, the charge pump operates charging up c out . each time the charge pump starts up from shutdown, the input current drawn by the internal charge pump ramps up at approximately 20ma/s until it reaches a level which is determined by r prog . C + C + charge pump 10 9 3 8 c out c top c bot v in 1.2v 1 3000i clk run/stop c1 c2 2 c C c + 4 shdn cx 5 pgood 3225 f01 gnd soft-start and shutdown control thermal protection oscillator v ref C 2% v ref C 6% v ref C 7.2% 1.088v (ltc3225) 1.067v (ltc3225-1) 1.2v v ref v sel 6 prog r prog run i 7 r1 r2 por uvlo por v in c fly
ltc3225/ltc3225-1 7 3225fb operation once the output voltage is charged to the preset volt- age threshold, the part shuts down the internal charge pump and enters into a low current state. in this state, the ltc3225/ltc3225-1 consume only about 20a from the input supply. the current drawn from c out is approximately 2a. automatic cell balancing due to manufacturing tolerances, capacitance and leakage current can vary from supercapacitor to supercapacitor. without the automatic cell balancing scheme used in the ltc3225/ltc3225-1, the voltages across the supercapaci- tors could differ from each other and potentially overvoltage a cell. this can affect the performance and lifetime of a supercapacitor. the ltc3225/ltc3225-1 constantly monitor the volt- age across both supercapacitors while charging. when the voltage across the supercapacitors is equal, both capacitors are charged with equal currents. if the voltage across one supercapacitor is lower than the other, the lower supercapacitors charge current is increased and the higher supercapacitors charge current is decreased. the greater the difference between the supercapacitor voltages, the greater the difference in charge current per capacitor. the charge currents can increase or decrease as much as 50% to balance the voltage across the su- percapacitors. when the cell voltages are balanced, the supercapacitors are charged at a rate of approximately: i cout = 1 2 ?i vin if the leakage currents or capacitances of the two superca- pacitors are mismatched enough that varying the charge current is not suf? cient to balance their voltages, the ltc3225/ltc3225-1 stop charging the capacitor with the higher voltage until they are again balanced. this feature protects either capacitor from experiencing an overvoltage condition. attempting to equalize the voltages using parallel resistors wastes power, discharges the supercapacitors, and takes time to equalize the voltages. a 30% capacitance mismatch leads to a 30% initial voltage difference after charging. it takes hours to equalize the voltages across 1f supercapacitors using 10k resistors. shutdown mode asserting shdn low causes the ltc3225/ltc3225-1 to enter shutdown mode. with the shdn pin connected to v in and the input supply removed or grounded, less than 1a is consumed from the output, allowing the superca- pacitors to remain charged. if the input supply is present at v in and the shdn pin is grounded, the ltc3225/ltc3225-1 draw approximately 1a of supply current. with the voltage at the c out pin discharged to 0v, this current drops to less than 1a. since the shdn pin is a high impedance cmos input, it should never be allowed to ? oat. output voltage programming the ltc3225/ltc3225-1 have a v sel input pin that allows the user to set the output threshold voltage to either 4.8v or 5.3v for the ltc3225 and 4v or 4.5v for the ltc3225-1 by forcing a low or high at the v sel pin respectively. output status indicator (pgood) during shutdown, the pgood pin is high impedance. when the charge cycle starts, an internal n-channel mosfet pulls the pgood pin to ground. when the output voltage, v out , is within 6% (typical) of its ? nal value, the pgood pin becomes high impedance, but charge current continues to ? ow until v out crosses the charge termination voltage. when v out drops 7% below the charge termination volt- age, the pgood pin again pulls low. current limit/thermal protection the ltc3225/ltc3225-1 have built-in current limit as well as overtemperature protection. if the prog pin is shorted to ground, a protection circuit automatically shuts off the internal charge pump. at higher temperatures, or if the input voltage is high enough to cause excessive self-heat- ing of the part, the thermal shutdown circuitry shuts down the charge pump once the junction temperature exceeds approximately 150c. it will enable the charge pump once the junction temperature drops back to approximately 135c. the ltc3225/ltc3225-1 are able to cycle in and out of thermal shutdown inde? nitely without latch-up or damage until the overcurrent condition is removed.
ltc3225/ltc3225-1 8 3225fb applications information programming charge current the charge current is programmed with a single resistor connecting the prog pin to ground. the program resistor and the input/output charge currents are calculated using the following equations: i vin = 3600v r prog i out = i vin 2 (with matched output capacitors) an r prog resistor value of 2k or less (i.e., short circuit) causes the ltc3225/ltc3225-1 to enter overcurrent shutdown mode. this mode prevents damage to the part by shutting down the internal charge pump. power ef? ciency the power ef? ciency ( ) of the ltc3225/ltc3225-1 is similar to that of a linear regulator with an effective input voltage of twice the actual input voltage. in an ideal regulat- ing voltage doubler the power ef? ciency is given by: 2xideal = p out p in = v out ?i out v in ?2i out = v out 2v in at moderate to high output power the switching losses and quiescent current of the ltc3225/ltc3225-1 are negligible and the above expression is valid. for example, with v in = 3.6v, i out = 100ma and v out regulated to 5.3v, the measured ef? ciency is 71.2% which is in close agree- ment with the theoretical 73.6% calculation. effective open-loop output resistance (r ol ) the effective open-loop output resistance (r ol ) of a charge pump is an important parameter that describes the strength of the charge pump. the value of this parameter depends on many factors including the oscillator frequency (f osc ), value of the ? ying capacitor (c fly ), the non-overlap time, the internal switch resistances (r s ) and the esr of the external capacitors. charging time estimation the estimated charging time with equal initial voltages across the two supercapacitors is given by the equation: t chrg = c out ?v cout ?v ini ( ) i out where c out is the series output capacitance, v cout is the voltage threshold set by the v sel pin, v ini is the initial voltage at the c out pin and i out is the output charge current given by: i out = 1800v r prog when the charging process starts with unequal initial volt- ages across the supercapacitors, only the capacitor with the lower voltage level is charged; the other capacitor is not charged until the voltages equalize. this extends the charging time slightly. under the worst-case condition, whereby one capacitor is fully depleted while the other remains fully charged due to signi? cant leakage current mismatch, the charging time is about 1.5 times longer than normal. thermal management for higher input voltages and maximum output current, there can be substantial power dissipation in the ltc3225/ ltc3225-1. if the junction temperature increases above approximately 150c, the thermal shutdown circuitry auto- matically deactivates the output. to reduce the maximum junction temperature, a good thermal connection to the pc board is recommended. connecting the gnd pin (pin 8) and the exposed pad (pin 11) of the dfn package to a ground plane under the device on two layers of the pc board can reduce the thermal resistance of the package and pc board considerably.
ltc3225/ltc3225-1 9 3225fb v in capacitor selection the type and value of c in controls the amount of ripple present at the input pin (v in ). to reduce noise and ripple, it is recommended that low equivalent series resistance (esr) multilayer ceramic chip capacitors (mlccs) be used for c in . tantalum and aluminum capacitors are not recommended because of their high esr. the input current to the ltc3225/ltc3225-1 is relatively constant during both the input charging phase and the output charging phase but drops to zero during the clock non-overlap times. since the non-overlap time is small (~40ns) these missing notches result in only a small perturbation on the input power supply line. note that a higher esr capacitor, such as a tantalum, results in higher input noise. therefore, ceramic capacitors are recom- mended for their exceptional esr performance. further input noise reduction can be achieved by powering the ltc3225/ltc3225-1 through a very small series inductor as shown in figure 2. a 10nh inductor will reject the fast current notches, thereby presenting a nearly constant current load to the input power supply. for economy, the 10nh inductor can be fabricated on the pc board with about 1cm (0.4") of pc board trace. flying capacitor selection warning: polarized capacitors such as tantalum or alumi- num should never be used for the ? ying capacitor since its voltage can reverse upon start-up of the ltc3225/ ltc3225-1. low esr ceramic capacitors should always be used for the ? ying capacitor. the ? ying capacitor controls the strength of the charge pump. in order to achieve the rated output current, it is necessary to use at least 0.6f of capacitance for the ? ying capacitor. the effective capacitance of a ceramic capacitor varies with temperature and voltage in a manner primarily determined by its formulation. for example, a capacitor made of x5r or x7r material retains most of its capacitance from C40c to 85c whereas a z5u or y5v type capacitor loses considerable capacitance over that range. x5r, z5u and y5v capacitors may also have a poor voltage coef? cient causing them to lose 60% or more of their capacitance when the rated voltage is applied. therefore, when com- paring different capacitors, it is often more appropriate to compare the amount of achievable capacitance for a given case size rather than comparing the speci? ed capacitance value. for example, over rated voltage and temperature conditions, a 4.7f 10v y5v ceramic capacitor in a 0805 case may not provide any more capacitance than a 1f 10v x5r or x7r capacitor available in the same 0805 case. in fact, over bias and temperature range, the 1f 10v x5r or x7r provides more capacitance than the 4.7f 10v y5v capacitor. the capacitor manufacturers data sheet should be consulted to determine what value of capacitor is needed to ensure minimum capacitance values are met over operating temperature and bias voltage. 0.1f 10nh 2.2f 9 8, 11 3225 f02 ltc3225 ltc3225-1 v in v in gnd figure 2. 10nh inductor used for input noise reduction applications information
ltc3225/ltc3225-1 10 3225fb table 1 contains a list of ceramic capacitor manufacturers and how to contact them. table 1. capacitor manufacturers avx www.avx.com kemet www.kemet.com murata www.murata.com taiyo yuden www.t-yuden.com vishay www.vishay.com tdk www.component.tdk.com layout considerations due to the high switching frequency and high transient currents produced by the ltc3225/ltc3225-1, careful board layout is necessary for optimum performance. an unbroken ground plane and short connections to all the external capacitors improves performance and ensures proper regulation under all conditions. the voltages on the ? ying capacitor pins c + and c C have very fast rise and fall times. the high dv/dt values on these pins can cause energy to capacitively couple to adjacent printed circuit board traces. magnetic ? elds can also be generated if the ? ying capacitors are far from the part (i.e. the loop area is large). to prevent capacitive energy transfer, a faraday shield may be used. this is a grounded pc trace between the sensitive node and the ltc3225/ltc3225-1 pins. for a high quality ac ground it should be returned to a solid ground plane that extends all the way to the ltc3225/ltc3225-1. table 2. supercapacitor manufacturers cap-xx www.cap-xx.com ness cap www.nesscap.com maxwell www.maxwell.com bussmann www.cooperbussmann.com avx www.avx.com illinois capacitor www.illcap.com tecate group www.tecategroup.com charging a single supercapacitor the ltc3225/ltc3225-1 can also be used to charge a single supercapacitor by connecting two series-connected matched ceramic capacitors with a minimum capacitance of 100f in parallel with the supercapacitor as shown in figure 3. applications information figure 3. charging a single supercapacitor c1 c sup v out c1 = c2 100f c2 10 3 8, 11 3225 f03 ltc3225 ltc3225-1 c out c x gnd
ltc3225/ltc3225-1 11 3225fb typical application 5v supercapacitor back-up supply r2 10k ltc3225 ltc3225-1 prog v in v in 5v c out c + c x c1 1f c2 10f c5 22f c6 100f c7 100f c3 10f c4 2.2f c C v sel r1 12k r2 470k gnd shdn v in gnd ctl sense gate stat ltc4412 v in1 v in2 gnd i thm1 v out1 fb1 i thm2 v out2 fb2 ltm4616 1.8v 1.2v gnd q1 si4421dy q2 si4421dy r3 4.78k c8 100f 3225 ta02
ltc3225/ltc3225-1 12 3225fb package description ddb package 10-lead plastic dfn (3mm 2mm) (reference ltc dwg # 05-08-1722 rev ?) 2.00 p 0.10 (2 sides) note: 1. drawing conforms to version (wecd-1) in jedec package outline m0-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 p 0.10 bottom viewexposed pad 0.64 p 0.05 (2 sides) 0.75 p 0.05 r = 0.115 typ r = 0.05 typ 2.39 p 0.05 (2 sides) 3.00 p 0.10 (2 sides) 1 5 10 6 pin 1 bar top mark (see note 6) 0.200 ref 0 C 0.05 (ddb10) dfn 0905 rev ? 0.25 p 0.05 2.39 p 0.05 (2 sides) recommended solder pad pitch and dimensions 0.64 p 0.05 (2 sides) 1.15 p 0.05 0.70 p 0.05 2.55 p 0.05 package outline 0.25 p 0.05 0.50 bsc pin 1 r = 0.20 or 0.25 s 45 o chamfer 0.50 bsc
ltc3225/ltc3225-1 13 3225fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number b 6/10 updated note 3 in electrical characteristics section. updates to pins 8 and 11 in pin functions. update to text in layout considerations section. updated typical application and related parts. 2, 3 5 10 14 (revision history begins at rev b)
ltc3225/ltc3225-1 14 3225fb linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2008 lt 0610 rev b ? printed in usa related parts typical application part number description comments ltc1751-3.3/ltc1751-5 micropower 5v/3.3v doubler charge pumps i q = 20a, up to 100ma output, ms-8 package ltc3200 constant frequency doubler charge pump low noise, 5v output or adjustable ltc3203/ltc3203b/ ltc3203b-1/ltc3203-1 500ma low noise high ef? ciency dual mode step-up charge pumps v in : 2.7v to 5.5v, 3mm 3mm 10-lead dfn package ltc3204/ltc3204b-3.3/ ltc3204-5 low noise regulating charge pumps up to 150ma (ltc3204-5), up to 50ma (ltc3204-3.3) ltc3221/ltc3221-3.3/ ltc3221-5 micropower regulated charge pump up to 60ma output ltc3240-3.3/ltc3240-2.5 step-up/step-down regulated charge pumps up to 150ma output lt ? 3420/lt3420-1 1.4a/1a photo? ash capacitor charger with automatic top-off charges 220f to 320v in 3.7 seconds from 5v, v in : 2.2v to 16v, i sd < 1a, 10-lead ms package lt3468/lt3468-1/ lt3468-2 1.4a/1a/0.7a, photo? ash capacitor charger v in : 2.5v to 16v, charge time = 4.6 seconds for the lt3468 (0v to 320v, 100f, v in = 3.6v), i sd < 1a, thinsot? package ltc3484-0/ltc3484-1/ ltc3484-2 1.4a/0.7a/1a, photo? ash capacitor charger v in : 1.8v to 16v, charge time = 4.6 seconds for the lt3484-0 (0v to 320v, 100f, v in = 3.6v), i sd < 1a, 2mm 3mm 6-lead dfn package lt3485-0/lt3485-1/ lt3485-2/lt3485-3 1.4a/0.7a/1a/2a photo? ash capacitor charger with output voltage monitor and integrated igbt v in : 1.8v to 10v, charge time = 3.7 seconds for the lt3485-0 (0v to 320v, 100f, v in = 3.6v), i sd < 1a, 3mm 3mm 10-lead dfn driver lt3750 capacitor charger controller charges any size capacitor, 10-lead ms package lt3751 capacitor controller with regulation charges any size capacitor, 4mm 5mm qfn-20 package v in ltc3225/ ltc3225-1 charger 3 r6 1k m4 si4410dy gnd v out 1.8v 10a c1 47f 25v dcap m2 irf7424 c + c C cx gnd c out v in ltc3225/ ltc3225-1 charger 2 r5 1k m3 si4410dy m1 irf7424 3225 ta03 c + c C cx gnd c out v in ltc3225/ ltc3225-1 charger 1 c + c C cx c4 1f 10v c7 10f c6 0.1f r3 332k d4 cmsh3-20 r4 84.5k r2 100k r1 2k r7 10k c3 1f 10v c2 1f 10v gnd c out pgnd ltc4441-1 sgnd in drv cc v in en/ shdn 8 7 6 5 1 2 3 4 fb out vm ltc2915 sel1 tol/ mr sel2 rt gnd 8 7 6 5 1 2 3 4 rst v cc c5 10f v bias 3.3v v in 12v gnd gnd 10a d3 cmsh3-20 d2 cmsh3-20 v in + gnd v out gnd lt3740 lt3740 high efficiency down converter d1 cshd6-40c dpak + * * * requires pin 8 (gnd) and exposed pad to be connected to a thermal pad isolated from the system ground. 12v supercapacitor back-up supply

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